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<title>CMSIS-Core (Cortex-A): L2C-310 Cache Controller Functions</title>
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   <div id="projectname">CMSIS-Core (Cortex-A)
   &#160;<span id="projectnumber">Version 1.1.4</span>
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   <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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<div class="title">L2C-310 Cache Controller Functions<div class="ingroups"><a class="el" href="group__CMSIS__Core__FunctionInterface.html">Core Peripherals</a></div></div>  </div>
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<p>L2C-310 Cache Controller gives access to functions for level 2 cache maintenance.<br/>
Reference: <a href="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246h/index.html">Level 2 Cache Controller L2C-310 Technical Reference Manual</a>.  
<a href="#details">More...</a></p>
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structL2C__310__TypeDef.html">L2C_310_TypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Union type to access the L2C_310 Cache Controller.  <a href="structL2C__310__TypeDef.html#details">More...</a><br/></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:ga3b08fba5b9be921c8a971231f75f8764"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga3b08fba5b9be921c8a971231f75f8764">L2C_310</a>&#160;&#160;&#160;((<a class="el" href="structL2C__310__TypeDef.html">L2C_310_TypeDef</a> *)<a class="el" href="ARMCA9_8h.html#a5ce89d9feb78e20a4034f025eec392b4">L2C_310_BASE</a>)</td></tr>
<tr class="memdesc:ga3b08fba5b9be921c8a971231f75f8764"><td class="mdescLeft">&#160;</td><td class="mdescRight">L2C_310 register set access pointer.  <a href="#ga3b08fba5b9be921c8a971231f75f8764">More...</a><br/></td></tr>
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Functions</h2></td></tr>
<tr class="memitem:ga164c59c55e2d18bf8a94dc91c0f4ce68"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga164c59c55e2d18bf8a94dc91c0f4ce68">L2C_Sync</a> (void)</td></tr>
<tr class="memdesc:ga164c59c55e2d18bf8a94dc91c0f4ce68"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cache Sync operation by writing CACHE_SYNC register.  <a href="#ga164c59c55e2d18bf8a94dc91c0f4ce68">More...</a><br/></td></tr>
<tr class="separator:ga164c59c55e2d18bf8a94dc91c0f4ce68"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga75af64212e1d3d0b3ade860c365e95b3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga75af64212e1d3d0b3ade860c365e95b3">L2C_GetID</a> (void)</td></tr>
<tr class="memdesc:ga75af64212e1d3d0b3ade860c365e95b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read cache controller cache ID from CACHE_ID register.  <a href="#ga75af64212e1d3d0b3ade860c365e95b3">More...</a><br/></td></tr>
<tr class="separator:ga75af64212e1d3d0b3ade860c365e95b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0c334fa25720d77e78cfa187bdf833be"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga0c334fa25720d77e78cfa187bdf833be">L2C_GetType</a> (void)</td></tr>
<tr class="memdesc:ga0c334fa25720d77e78cfa187bdf833be"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read cache controller cache type from CACHE_TYPE register.  <a href="#ga0c334fa25720d77e78cfa187bdf833be">More...</a><br/></td></tr>
<tr class="separator:ga0c334fa25720d77e78cfa187bdf833be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5b0ea2db52d137b5531ce568479c9d17"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga5b0ea2db52d137b5531ce568479c9d17">L2C_InvAllByWay</a> (void)</td></tr>
<tr class="memdesc:ga5b0ea2db52d137b5531ce568479c9d17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalidate all cache by way.  <a href="#ga5b0ea2db52d137b5531ce568479c9d17">More...</a><br/></td></tr>
<tr class="separator:ga5b0ea2db52d137b5531ce568479c9d17"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabd0a9b10926537fa283c0bb30d54abc7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#gabd0a9b10926537fa283c0bb30d54abc7">L2C_CleanInvAllByWay</a> (void)</td></tr>
<tr class="memdesc:gabd0a9b10926537fa283c0bb30d54abc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean and Invalidate all cache by way.  <a href="#gabd0a9b10926537fa283c0bb30d54abc7">More...</a><br/></td></tr>
<tr class="separator:gabd0a9b10926537fa283c0bb30d54abc7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga720c36b4cd1d6c070ed0d2c49cffd7e1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga720c36b4cd1d6c070ed0d2c49cffd7e1">L2C_Enable</a> (void)</td></tr>
<tr class="memdesc:ga720c36b4cd1d6c070ed0d2c49cffd7e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable Level 2 Cache.  <a href="#ga720c36b4cd1d6c070ed0d2c49cffd7e1">More...</a><br/></td></tr>
<tr class="separator:ga720c36b4cd1d6c070ed0d2c49cffd7e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga66767e7f30f52d72de72231b2d6abd34"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga66767e7f30f52d72de72231b2d6abd34">L2C_Disable</a> (void)</td></tr>
<tr class="memdesc:ga66767e7f30f52d72de72231b2d6abd34"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable Level 2 Cache.  <a href="#ga66767e7f30f52d72de72231b2d6abd34">More...</a><br/></td></tr>
<tr class="separator:ga66767e7f30f52d72de72231b2d6abd34"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4cf213e72c97776def35ab8223face82"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga4cf213e72c97776def35ab8223face82">L2C_InvPa</a> (void *pa)</td></tr>
<tr class="memdesc:ga4cf213e72c97776def35ab8223face82"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalidate cache by physical address.  <a href="#ga4cf213e72c97776def35ab8223face82">More...</a><br/></td></tr>
<tr class="separator:ga4cf213e72c97776def35ab8223face82"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga242f6fa13f33e7d5cdd7d92935d52f5f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#ga242f6fa13f33e7d5cdd7d92935d52f5f">L2C_CleanPa</a> (void *pa)</td></tr>
<tr class="memdesc:ga242f6fa13f33e7d5cdd7d92935d52f5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean cache by physical address.  <a href="#ga242f6fa13f33e7d5cdd7d92935d52f5f">More...</a><br/></td></tr>
<tr class="separator:ga242f6fa13f33e7d5cdd7d92935d52f5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaff11c6afa9eaacb4cdfcfe5c36f57eb"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__L2__cache__functions.html#gaaff11c6afa9eaacb4cdfcfe5c36f57eb">L2C_CleanInvPa</a> (void *pa)</td></tr>
<tr class="memdesc:gaaff11c6afa9eaacb4cdfcfe5c36f57eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clean and invalidate cache by physical address.  <a href="#gaaff11c6afa9eaacb4cdfcfe5c36f57eb">More...</a><br/></td></tr>
<tr class="separator:gaaff11c6afa9eaacb4cdfcfe5c36f57eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<h2 class="groupheader">Macro Definition Documentation</h2>
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          <td class="memname">#define L2C_310&#160;&#160;&#160;((<a class="el" href="structL2C__310__TypeDef.html">L2C_310_TypeDef</a> *)<a class="el" href="ARMCA9_8h.html#a5ce89d9feb78e20a4034f025eec392b4">L2C_310_BASE</a>)</td>
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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void L2C_CleanInvAllByWay </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="gaaff11c6afa9eaacb4cdfcfe5c36f57eb"></a>
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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void L2C_CleanInvPa </td>
          <td>(</td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>pa</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">pa</td><td>Pointer to data to invalidate cache for. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a class="anchor" id="ga242f6fa13f33e7d5cdd7d92935d52f5f"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void L2C_CleanPa </td>
          <td>(</td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>pa</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramdir">[in]</td><td class="paramname">pa</td><td>Pointer to data to invalidate cache for. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a class="anchor" id="ga66767e7f30f52d72de72231b2d6abd34"></a>
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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void L2C_Disable </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void L2C_Enable </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int L2C_GetID </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="section return"><dt>Returns</dt><dd><a class="el" href="structL2C__310__TypeDef.html#a87833c2acdf685d6ad6d0811f45677d7" title="Offset: 0x0000 (R/ ) Cache ID Register. ">L2C_310_TypeDef::CACHE_ID</a> </dd></dl>

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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> int L2C_GetType </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="section return"><dt>Returns</dt><dd><a class="el" href="structL2C__310__TypeDef.html#af19e1fd8a729834557884232c9e50bd2" title="Offset: 0x0004 (R/ ) Cache Type Register. ">L2C_310_TypeDef::CACHE_TYPE</a> </dd></dl>

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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void L2C_InvAllByWay </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void L2C_InvPa </td>
          <td>(</td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>pa</em></td><td>)</td>
          <td></td>
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<dl class="params"><dt>Parameters</dt><dd>
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    <tr><td class="paramdir">[in]</td><td class="paramname">pa</td><td>Pointer to data to invalidate cache for. </td></tr>
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          <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void L2C_Sync </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
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